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Wednesday 24 July 2013

SPI-3
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Don't confused with SPI(system peripheral interconnect).

System Packet Interface Level 3 is an interface used for the chip to chip communication .It is a packet level interface for the network devices/MAC/network processors operates in Physical & Link layer .SPI protocol is widely deployed protocol for the packet and cell transfer between PHY & Link layer devices in Multi Gig applications.

Most of the packet processor's required to exchange there control and packet information's to the co-processors or controllers through SPI type interface's.High Bandwidth capability is the most critical requirement  of this type of interface.Its just like a control data streaming channel between two devices.

Some of the SPI interface classes supported for the Packet Over SONET & Optical transport network devices are given.

SPI-3- 2.488Gbps Operating devices
SPI-4.x- 10Gbps Operating devices
SPI-5- 40Gbps Operating devices

Interface Details
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The basic SPI-3 interface consists of
*32 TTL signals for data transfer
*8 TTL signals for control
*1 TTL signal for clock
*8 TTL for status update of the additional multi-channels

Line rate maximum up to 2.488Gbps.

Tuesday 23 July 2013

Role of IRIG-B in the filed of Network Time Synchronization 

IRIG-B Extraction:

IRIG-B(Inter-Range Instrumentation Group and B preceding with the IRIG is representing the common time code used).

IRIG-B Definition:

IRIG-B is a special type of time synchronization standard used in Substation device/network devices which cannot support IEEE1588-PTP synchronization.It can be used to synchronize different types of IED's and network devices in a substation network.
IRIG-B coding for synchronization of existing devices that are not cable of synchronized with IEEE1588 PTP packets and allowing them to be synchronized with the new age networks.

How IRIG-B Works:

In IEEE1588,synchronization information's are passed over the Ethernet medium as data packets (IP Packets).But in existing (old-age) devices are not able to handling such 1588 padded information.So at the network edge (Ethernet Router/Swithes inbuilt devices).These network edge device will be having the IRIG-B protocol which will code Synchronization information in the format of IRIG-B.

Accuracy:
Accuracy of IRIG-B timing prototcol  in IED's will be in the range of 100 microsecond.

Implementation & Draw Back:

 A dedicate Coax-or Twisted pair cable required to transport the IRIG-B timing information.
Draw back: Connectivity is limited to less number of devices due to the dependency in Coax length.Also maintenance and deployment cost are high when we compared with IEEE1588-time synchronization.